TSMC disclosed a three-week production slip at Fab 18 overnight, and the same node services every advanced AI accelerator in your book. NVIDIA runs 95-100% of its silicon through TSMC and holds $50.3B in committed supply alongside more than 60% of global CoWoS packaging capacity, putting Blackwell Ultra allocations to Microsoft, Meta, and Oracle first in line to be trimmed. AMD's MI300X and EPYC pipelines pull from the same 3nm/5nm processes for 85-90% of their volume. Apple sources 100% of its A-series silicon from TSMC, but Foxconn confirmed the iPhone 17 Pro line is tracking on schedule out of Zhengzhou and India — roughly 80% of chip orders for the cycle were filled before the disruption began.
Two AMD-side data points cut the other way. Microsoft expanded Azure capacity built around Instinct MI300X across multiple regions, extending last quarter's design win and reinforcing the data-center mix that has been AMD's fastest-growing segment. Separately, AMD signed a multi-year extension with Cadence Design Systems through 2028 for advanced-node EDA tooling, locking in the design-tool stack for 3nm and 5nm tape-outs at the same moment Intel narrows its foundry roadmap.
On the Apple side, the inventory cushion absorbs most of the foundry slip without disturbing product cadence; services revenue remains the dominant earnings driver. Against that, NVIDIA's Blackwell Ultra rationing through Q3 is the cyclical headwind, with hyperscaler delivery windows compressing before the CoWoS bottleneck eases.
Across these events, the EU AI Act's Phase 2 enforcement went live on May 2, adding a disclosure regime for general-purpose model providers that touches NVIDIA's customer base most directly and AMD and Apple secondarily through on-device inference. At the same time, Intel pulling back on 18A removes second-source optionality across the industry: TSMC's role as the only credible advanced-node foundry is becoming structurally more entrenched. The morning's net read is a tighter capacity picture into Q3, partly cushioned by AMD's data-center traction and Apple's inventory buffer.
Today's Signals
TSMC disclosed a three-week production slip at Fab 18 overnight, and the same node services every advanced AI accelerator in your book. NVIDIA runs 95-100% of its silicon through TSMC and holds $50.3B in committed supply alongside more than 60% of global CoWoS packaging capacity, putting Blackwell Ultra allocations to Microsoft, Meta, and Oracle first in line to be trimmed. AMD's MI300X and EPYC pipelines pull from the same 3nm/5nm processes for 85-90% of their volume. Apple sources 100% of its A-series silicon from TSMC, but Foxconn confirmed the iPhone 17 Pro line is tracking on schedule out of Zhengzhou and India — roughly 80% of chip orders for the cycle were filled before the disruption began.
Two AMD-side data points cut the other way. Microsoft expanded Azure capacity built around Instinct MI300X across multiple regions, extending last quarter's design win and reinforcing the data-center mix that has been AMD's fastest-growing segment. Separately, AMD signed a multi-year extension with Cadence Design Systems through 2028 for advanced-node EDA tooling, locking in the design-tool stack for 3nm and 5nm tape-outs at the same moment Intel narrows its foundry roadmap.
On the Apple side, the inventory cushion absorbs most of the foundry slip without disturbing product cadence; services revenue remains the dominant earnings driver. Against that, NVIDIA's Blackwell Ultra rationing through Q3 is the cyclical headwind, with hyperscaler delivery windows compressing before the CoWoS bottleneck eases.
Across these events, the EU AI Act's Phase 2 enforcement went live on May 2, adding a disclosure regime for general-purpose model providers that touches NVIDIA's customer base most directly and AMD and Apple secondarily through on-device inference. At the same time, Intel pulling back on 18A removes second-source optionality across the industry: TSMC's role as the only credible advanced-node foundry is becoming structurally more entrenched. The morning's net read is a tighter capacity picture into Q3, partly cushioned by AMD's data-center traction and Apple's inventory buffer.